SDK:orangepizero3 6.1.31
1. Hardware connection
orangepi zero3 | ips display |
GND | GND |
3.3V | 3.3V |
SPI0_CLK(PH6) | SCL |
SPI0_MOSI (PH7) | SDA |
PC14 | RES |
PC15 | DC |
PC9 | BLK |
2. Transplantation
1.1 Modify the device tree and add the st7789v node
File path: arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero3.dts
&spi0 { #address-cells = <1>; #size-cells = <0>; status = "okay"; pinctrl-names = "default"; pinctrl-0 = < & amp;spi0_pins>; st7789v@0{ compatible = "sitronix,st7789v"; reg = <0>; status="okay"; spi-max-frequency = <48000000>; rotate = <0>; fps = <60>; buswidth = <8>; dc = < &pio 2 15 GPIO_ACTIVE_HIGH>; reset = < & amp;pio 2 14 GPIO_ACTIVE_HIGH>; led = < & amp;pio 2 9 GPIO_ACTIVE_HIGH>; debug = <0>; }; };
1.2 HDMI output is turned off, and there will be no display on the spi screen if it is not turned off.
File path: arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero3.dts
&hdmi { //hvcc-supply = < & amp;reg_bldo1>; status = "disabled"; };
1.3 Configure the spi pin and pull up the pin
File path: arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
spi0_pins: spi0-pins { pins = "PH6", "PH7"; function = "spi1"; bias-pull-up; //Pin pull-up };
spi0: spi@5010000 { compatible = "allwinner,sun50i-h616-spi", "allwinner,sun8i-h3-spi"; reg = <0x05011000 0x1000>; interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; clocks = < & amp;ccu CLK_BUS_SPI1>, < & amp;ccu CLK_SPI1>; clock-names = "ahb", "mod"; resets = < & amp;ccu RST_BUS_SPI1>; pinctrl-names = "default"; pinctrl-0 = < & amp;spi1_pins>, < & amp;spi1_cs1_pin>; dmas = < & amp;dma 23>, < & amp;dma 23>; dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; #size-cells = <0>; };
2.1 Modify driver files
File path: drivers/staging/fbtft/fb_st7789v.c
// SPDX-License-Identifier: GPL-2.0 + /* * FB driver for the ST7789V LCD Controller * * Copyright (C) 2015 Dennis Menschel */ #include <linux/bitops.h> #include <linux/delay.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/module.h> #include <video/mipi_display.h> #include <linux/gpio.h> #include "fbtft.h" #define DRVNAME "fb_st7789v" #define DEFAULT_GAMMA \ "D0 04 0D 11 13 2B 3F 54 4C 18 0D 0B 1F 23\\ " \ "D0 04 0C 11 13 2C 3F 44 51 2F 1F 1F 20 23" /** * enum st7789v_command - ST7789V display controller commands * * @PORCTRL: porch setting * @GCTRL: gate control * @VCOMS: VCOM setting * @VDVVRHEN: VDV and VRH command enable * @VRHS: VRH set * @VDVS: VDV set * @VCMOFSET: VCOM offset set * @PWCTRL1: power control 1 * @PVGAMCTRL: positive voltage gamma control * @NVGAMCTRL: negative voltage gamma control * * The command names are the same as those found in the datasheet to ease * looking up their semantics and usage. * * Note that the ST7789V display controller offers quite a few more commands * which have been omitted from this list as they are not used at the moment. * Furthermore, commands that are compliant with the MIPI DCS have been left * out as well to avoid duplicate entries. */ enum st7789v_command { PORCTRL = 0xB2, GCTRL = 0xB7, VCOMS = 0xBB, LCMCTRL = 0xC0, VDVVRHEN = 0xC2, VRHS = 0xC3, VDVS = 0xC4, VCMOFSET = 0xC5, FRCTRL2 = 0xC6, PWCTRL1 = 0xD0, PVGAMCTRL = 0xE0, NVGAMCTRL = 0xE1, }; #define MADCTL_BGR BIT(3) /* bitmask for RGB/BGR order */ #define MADCTL_MV BIT(5) /* bitmask for page/column order */ #define MADCTL_MX BIT(6) /* bitmask for column address order */ #define MADCTL_MY BIT(7) /* bitmask for page address order */ /** * init_display() - initialize the display controller * * @par: FBTFT parameter object * * Most of the commands in this init function set their parameters to the * same default values which are already in place after the display has been * powered up. (The main exception to this rule is the pixel format which * would default to 18 instead of 16 bit per pixel.) * Nonetheless, this sequence can be used as a template for concrete * displays which usually need some adjustments. * * Return: 0 on success, < 0 if error occurred. */ static int init_display(struct fbtft_par *par) { par->fbtftops.reset(par); mdelay(50); write_reg(par,0x11); \t mdelay(120); write_reg(par,0x36,0x00); write_reg(par,0x3A,0x05); write_reg(par,0xB2,0x0C,0x0C,0x00,0x33,0x33); write_reg(par,0xB7,0x35); write_reg(par,0xBB,0x19); write_reg(par,0xC0,0x2C); write_reg(par,0xC2,0x01); write_reg(par,0xC3,0x12); write_reg(par,0xC4,0x20); write_reg(par,0xC6,0x0F); write_reg(par,0xD0,0xA4,0xA1); write_reg(par,0xE0,0xD0,0x04,0x0D,0x11,0x13,0x2B,0x3F,0x54,0x4C,0x18,0x0D,0x0B,0x1F,0x23); write_reg(par,0xE1,0xD0,0x04,0x0C,0x11,0x13,0x2C,0x3F,0x44,0x51,0x2F,0x1F,0x1F,0x20,0x23); write_reg(par,0x21); // write_reg(par,0x11); // mdelay(50); write_reg(par,0x29); mdelay(200); pr_info("fbtft_%s ok!\\ ", __func__); return 0; } static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) { write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS, xs >> 8, xs & amp; 0xFF, xe >> 8, xe & amp; 0xFF); write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS, ys >> 8, ys & amp; 0xFF, ye >> 8, ye & amp; 0xFF); write_reg(par, MIPI_DCS_WRITE_MEMORY_START); } /** * set_var() - apply LCD properties like rotation and BGR mode * * @par: FBTFT parameter object * * Return: 0 on success, < 0 if error occurred. */ static int set_var(struct fbtft_par *par) { u8 madctl_par = 0; if (par->bgr) madctl_par |= MADCTL_BGR; switch (par->info->var.rotate) { case 0: break; case 90: madctl_par |= (MADCTL_MV | MADCTL_MY); break; case 180: madctl_par |= (MADCTL_MX | MADCTL_MY); break; case 270: madctl_par |= (MADCTL_MV | MADCTL_MX); break; default: return -EINVAL; } write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, madctl_par); return 0; } /** * set_gamma() - set gamma curves * * @par: FBTFT parameter object * @curves: gamma curves * * Before the gamma curves are applied, they are preprocessed with a bitmask * to ensure syntactically correct input for the display controller. * This implies that the curves input parameter might be changed by this * function and that illegal gamma values are auto-corrected and not * reported as errors. * * Return: 0 on success, < 0 if error occurred. */ static int set_gamma(struct fbtft_par *par, u32 *curves) { int i; int j; int c; /* curve index offset */ /* * Bitmasks for gamma curve command parameters. * The masks are the same for both positive and negative voltage * gamma curves. */ static const u8 gamma_par_mask[] = { 0xFF, /* V63[3:0], V0[3:0]*/ 0x3F, /* V1[5:0] */ 0x3F, /* V2[5:0] */ 0x1F, /* V4[4:0] */ 0x1F, /* V6[4:0] */ 0x3F, /* J0[1:0], V13[3:0] */ 0x7F, /* V20[6:0] */ 0x77, /* V36[2:0], V27[2:0] */ 0x7F, /* V43[6:0] */ 0x3F, /* J1[1:0], V50[3:0] */ 0x1F, /* V57[4:0] */ 0x1F, /* V59[4:0] */ 0x3F, /* V61[5:0] */ 0x3F, /* V62[5:0] */ }; for (i = 0; i < par->gamma.num_curves; i + + ) { c = i * par->gamma.num_values; for (j = 0; j < par->gamma.num_values; j + + ) curves[c + j] & amp;= gamma_par_mask[j]; write_reg(par, PVGAMCTRL + i, curves[c + 0], curves[c + 1], curves[c + 2], curves[c + 3], curves[c + 4], curves[c + 5], curves[c + 6], curves[c + 7], curves[c + 8], curves[c + 9], curves[c + 10], curves[c + 11], curves[c + 12], curves[c + 13]); } return 0; } /** * blank() - blank the display * * @par: FBTFT parameter object * @on: whether to enable or disable blanking the display * * Return: 0 on success, < 0 if error occurred. */ static int blank(struct fbtft_par *par, bool on) { if (on) write_reg(par, MIPI_DCS_SET_DISPLAY_OFF); else write_reg(par, MIPI_DCS_SET_DISPLAY_ON); return 0; } static struct fbtft_display display = { .regwidth = 8, .width = 240, .height = 240, .gamma_num = 2, .gamma_len = 14, .gamma = DEFAULT_GAMMA, .fbtftops = { .init_display = init_display, .set_addr_win = set_addr_win, .set_var = set_var, .set_gamma = set_gamma, .blank = blank, }, }; FBTFT_REGISTER_DRIVER(DRVNAME, "sitronix,st7789v", & amp;display); MODULE_ALIAS("spi:" DRVNAME); MODULE_ALIAS("platform:" DRVNAME); MODULE_ALIAS("spi:st7789v"); MODULE_ALIAS("platform:st7789v"); MODULE_DESCRIPTION("FB driver for the ST7789V LCD Controller"); MODULE_AUTHOR("Dennis Menschel"); MODULE_LICENSE("GPL");
2.2 Modify fbtft-core.c
File path: drivers/staging/fbtft/fbtft-core.c
Add header file
#include <linux/gpio.h> #include <linux/of_gpio.h>
static int fbtft_request_one_gpio(struct fbtft_par *par, const char *name, int index, struct gpio_desc **gpiop) { struct device *dev = par->info->device; struct device_node *node = dev->of_node; int gpio, flags, ret = 0; enum of_gpio_flags of_flags; if (of_find_property(node, name, NULL)) { gpio = of_get_named_gpio_flags(node, name, index, & amp;of_flags); if (gpio == -ENOENT) return 0; if (gpio == -EPROBE_DEFER) return gpio; if (gpio < 0) { dev_err(dev, "failed to get '%s' from DT\\ ", name); return gpio; } //active low translates to initially low flags = (of_flags & OF_GPIO_ACTIVE_LOW) ? GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH; ret = devm_gpio_request_one(dev, gpio, flags, dev->driver->name); if (ret) { dev_err(dev, "gpio_request_one('%s'=%d) failed with %d\\ ", name, gpio, ret); return ret; } *gpiop = gpio_to_desc(gpio); fbtft_par_dbg(DEBUG_REQUEST_GPIOS, par, "%s: '%s' = GPIO%d\\ ", __func__, name, gpio); } return ret; }
static void fbtft_reset(struct fbtft_par *par) { if (!par->gpio.reset) return; gpiod_set_value_cansleep(par->gpio.reset, 1); msleep(10); gpiod_set_value_cansleep(par->gpio.reset, 0); msleep(200); gpiod_set_value_cansleep(par->gpio.reset, 1); /* Activate chip */ msleep(10); }
3.1 Compilation configuration
Driver st7789v and compile it into the kernel, as follows:
Device Drivers ->
[*] Staging drivers ->
<*> Support for small TFT LCD display modules ->
<*> FB driver for the ST7789V LCD Controller
4.1 Update device tree and kernel (refer to Orangepi zero3 manual)