High-quality 51 microcontroller timer/counter explanation

Understand the timer/counter of 51 microcontroller in one article

- Foreword:
Timer/Counter
1. Goals:
2. 51 microcontroller timer/counter
- 2.1. The essence of timer/counter
- 2.2. 51-core microcontroller fixed/counter design ideas
- 2.3 Working principle (compare the following text with the picture above to understand)

Foreword:

Most of the explanations about timers on the Internet start with an introduction to timer-related registers, which is too abstract for beginners. This article will start from First Principles and introduce that the essence of timers/counters in digital systems is counters. Later, it will introduce the source of ideas for specific timer design, so that beginners can easily start using Comman Sense. Understand the timers/counters in microcontrollers. The relevant content is not limited to 51-core microcontrollers, but also applies to high-performance microprocessors such as STM32.

Timer/Counter

1. Goal:

1. Master the essence of timing in microcontroller systems
2. Master the working principle of timer
3. Understand timer settings

2. 51 microcontroller timer/counter

The timer/counter module is an important internal resource of the microcontroller. Using timer-related functions, many time-related tasks can be implemented.

We commonly use the following two methods to set the initial timing value of the 51 microcontroller timer:

//When the crystal oscillator is 12MHz
TL0=(65536-timing time us)%6; //or TL0=(65536-timing time us);
TH0=(65536-timing time us)/256; //or TH0=(65536-timing time us)>>8;
//When calculating flexibly based on the system clock
#define FOSC 11059200 //The macro defines the crystal oscillator as FOSC, commonly used 11.0592MHz
TL0=(65536-timing time us * FOSC/12)%6; //or TL0=(65536-timing time us * FOSC /12));
TH0=(65536-timing time us * FOSC/12))/256; //or TH0=(65536-timing time us * FOSC /12))>>8;

2.1. The nature of timer/counter

\qquad

To use a timer/counter, you first need to understand how it works. So is there a concept of time in digital systems? Digital systems inherently lack an accurate concept of time.

Frequency and period.
The parameter usually of interest for pulses is the pulse frequency
f

f

f, while the pulse frequency

f

f

f is defined as the number of signal changes per second, which leads to the first time-related quantity – seconds.
Another parameter of the pulse signal that is directly related to time is the period.

T

T

T, the relationship between period and frequency is

T

=

1

/

f

T=1/f

T=1/f
Frequency and time.
1. Pulse signals of different frequencies have different periods. For the frequency
  f
  
  0
  
  f_0
  
  The pulse of f0?, its corresponding period
  
  T
  
  0
  
  =
  
  1
  
  /
  
  f
  
  0
  
  T_0=1/f_0
  
  T0?=1/f0? is also certain.
  Obviously,
  
  n
  
  n
  
  The time length corresponding to n pulse signals of this frequency is
  
  T
  
  s
  
  =
  
  n
  
  ?
  
  T
  
  0
  
  ,
  
  T
  
  s
  
  ∝
  
  n
  
  Ts=n * T_0，Ts \propto n
  
  Ts=n?T0?, Ts∝n,that is, the duration Ts and the number of pulses
  
  n
  
  n
  
  n is directly proportional to therelationship.
2. To be timed, usually the length of time to be timed
  T
  
  s
  
  Ts
  
  Ts is preset and known by humans,
  Therefore the formula
  
  T
  
  s
  
  =
  
  n
  
  ?
  
  T
  
  0
  
  become
  
  n
  
  =
  
  T
  
  s
  
  /
  
  T
  
  0
  
  =
  
  T
  
  s
  
  ?
  
  f
  
  0
  
  Ts=n * T_0 becomes n= Ts/T_0=Ts*f_0
  
  Ts=n?T0? becomes n=Ts/T0?=Ts?f0?. It can be seen that timing can be achieved by counting pulses or controlling the number of pulses.
  
  For example:
  
  \color{red}{For example:}
  
  For example:
```
 1. It is necessary to use a pulse signal with a frequency of f=1MHz to achieve timing Ts=10ms.
  The number of pulses corresponding to 10ms
                  n=Ts * f
  n= 10ms * 1000 000 pieces/s
                  = 0.01s * 1000 000 pieces/s
                  = 10 000 pulses
  Here, only 10,000 pulses need to be counted to achieve 10ms timing.
```
Summary. From the above analysis, we can see that the essence of timing is to count pulses, that is, the timer/counter is first a counter, and then a timer.

2.2, 51 core microcontroller fixed/counter design ideas

Structure diagram. The internal structure diagram of the 51-core microcontroller Timer 0 (Timer0, T0 for short) 16-bit timer/counter is shown below.
Control path structure design ideas.
1. The pulse counter counts pulses and cannot directly count without control, so a switch (Switch 3) is needed to control the pulse signal to count on demand.
2. For the counter, if the measured signal is known, it can not only implement counting, but also timing function, so set a < strong>Switch No. 2It is convenient for users to set according to actual needs, whether to input the pulse signal of the known frequency of SYSclk or to receive the unknown pulse signal from outside TO_Pin.
3. In order to increase the control flexibility of the main switch No. 3 switch, it can be controlled by program control or external signal control, so it is set MicrocontrollerInternal GATE and external
I

N

T

0

￣

\overline{INT0}

INT0 is used as a control quantity to control Switch No. 3. Since the control quantity has external signals and is uncontrollable, an AND gate circuit is set up at the front end and TR0 is used to control the above control quantity. Does it work.
4. The number of pulses is accumulated through a counter (actually it can be achieved by up counting or down counting). When a specific number of pulses needs to be counted, the accumulator needs to output a signal. , used to inform the setter that the quantity has been reached (similarly, if the pulse of a known frequency is targeted, it can be understood as the timing time has expired), so the ‘Raise the flag‘ (TF0) signal function has been added.

2.3 Working principle (compare the text below to the picture above)

The core component of the internal structure in the figure is a 16-bit counter composed of two 8-bit counters connected in series (similar to the splicing of two abacus), which realizes pulse processing. count.
The counting value range of its 16-bit counter is 0-65535, which can count up to
2

16

=

65536

2^{16}=65536

216=65536 pulses.
In the figureT0_Pin and

I

N

T

0

￣

\overline{INT0}

INT0 is an external signal and cannot be set through software.
The pulse signal path is controlled through multiple switching signals between the pulse counter and the pulse source.
The position of Switch No. 2 in the picture (by
C

/

C/

C/

T

￣

\overline{T}

T control) can select the pulse signal source: Sysclk or T0_Pin pin.
- Sysclk is the microcontroller system clock. For STC microcontrollers, its source can be an external crystal oscillator or the chip’s internal oscillation circuit. The conventional setting is 12MHz (the frequency is known< /strong>), so Sysclk is also called Clock Pulse.

Sysclk can be set via Switch 1 to set whether to divide the frequency (
÷

12

\div {12}

÷12) and then used as timing pulse signal source.

Switch No. 3 serves as the main switch for counting pulses. The pulse signal can be input to the counter only after it is closed. The logic control signal analysis is as follows:

No. 3 switch signal in the picture
‘

E

‘

=

1

‘E’=1

When ‘E’=1, it is closed and the counter can count; otherwise it is open and the counter has no pulse input.

The logical relationship of the double-inputAND gate is 0’ out of 0’:
E

=

C

?

D

=

T

R

0

?

D

E=C \cdot D = TR0 \cdot D

E=C?D=TR0?D, therefore only when

T

R

0

=

1

hour

E

=

C

E=C when TR0=1

When TR0=1, E=C, switch No. 3 controls the switch E=D by signal D’. Otherwise TR0=0 E=0, switch 3 is open

OR gate logic has 1’ out of 1’: $D = A | B $, where,
B

=

I

N

T

0

￣

B=\overline{INT0}

B=INT0 is the external input signal of the microcontroller. A is obtained by inverting the internal GATE control quantity.

A

=

G

A

T

E

￣

A=\overline{GATE}

A=GATE.
So let D=1,

I

N

T

0

￣

=

0

\overline{INT0}=0

INT0=0 or GATE=0. At least one of the two=0 can make D=1;

So, make
E

=

1

?

>

(

T

R

0

=

1

and

D

=

1

)

, to make

D

=

1

?

>

(

I

N

T

0

￣

=

0

or

G

A

T

E

=

0

)

E=1 -> (TR0=1 and D=1), make D=1->(\overline{INT0}=0 or GATE=0)

E=1?>(TR0=1 and D=1), to make D=1?>(INT0=0 or GATE=0)
When not relying on external signals, switch No. 3 is closed and needs to be set
TR0=1,GATE=0;
If switch 3 is closed controlled by external signal, it needs to be set
TR0=1,GATE=1;

Summary.
1. Implement external pulse counting function. Set to “Input external clock source from T0_Pin”. Commonly used related switch settings:
C

/

C/

C/

T

￣

=

1

\overline{T}=1

T=1,

T

R

0

=

1

,

G

A

T

E

=

0

TR0=1,GATE=0

TR0=1,GATE=0;
2. Implement the timer function. Set Sysclk as the clock source. Commonly used related switch settings: switch No. 1 to “Up” (AUXR.7 bit=0, default=0),

C

/

C/

C/

T

￣

=

0

\overline{T}=0

T=0,

T

R

0

=

1

,

G

A

T

E

=

0

TR0=1,GATE=0

TR0=1,GATE=0;

(To be continued)