1. Introduction to Output Comparison
1. Output comparison
OC (Output Compare) output comparison
The output comparison can set the output level to 1, set to 0 or flip the operation by comparing the relationship between the CNT (time base unit) and the CCR (capture unit) register value, which is used to output a PWM waveform with a certain frequency duty cycle (CC means capture/compare, R means Register, means register), this capture/compare register is shared by input capture and output comparison, when input capture is used, it is the capture register, when output comparison is used, it It is the compare register.
Each advanced timer and general purpose timer has 4 output compare channels
The first 3 channels of the advanced timer additionally feature dead-time generation and complementary outputs
Note: In simple terms, this circuit compares the values of CNT and CCR in the output comparison. CNT counts automatically, and CCR is a value we give. The output will output the corresponding 1 or 0.
The corresponding digital circuit block diagram is the red circle part
2. Introduction to PWM
PWM (Pluse Width Modulation) pulse width modulation
In a system with inertia, the required analog quantity can be equivalently obtained by modulating the width of a series of pulses, which is often used in fields such as motor speed control, that is to say, using this PWM waveform is used to wait Efficiently realize the output of an analog signal, that is, power on and off the motor at a very fast frequency, so that the motor can be maintained at a medium speed
PWM parameters: frequency = 1/Ts duty cycle = Ton/Ts resolution = duty cycle change step
3. The structure of the timer
1. Output comparison (OC) channel (general purpose timer module)
Illustration: In this figure, the CNT counter (in the time base unit module) and the capture/compare register of the first channel of CCR1 are on the left. They are compared. When CNT>CCR1 or CNT=CCR1, the output mode will be controlled. The device transmits a signal, and then the output mode controller will change the high and low level of its output OC1REF (the abbreviation of reference in REF, which means the reference signal), and then there is an ETRF input on it, which is a small function of the timer. No need to understand, then the REF signal can go to the main mode controller, you can map this REF to the TRGO output of the main mode, but it is mainly the lower one (polarity selection part), write 0 to this register, the signal will go up Go, that is, the signal level does not reverse when it comes in and what goes out. If you write 1, the signal will go down, that is, the signal is inverted through a NOT gate, and the output signal is the signal of the high and low level of the input signal, and then Next is the output enable circuit to choose whether to output or not, and finally the OC1 pin, which is the pin of the CH1 channel.
2. Output comparison channel (advanced timer)
The right side is the peripheral circuit, and OC1 and OC1N are complementary outputs, which respectively control the conduction and cut-off of the upper tube and the lower tube
Ideally, the lower tube should be turned off at the same moment when the upper tube is turned on, but in reality, the upper tube may not be completely closed due to the unsatisfactory device, and the lower tube will be turned on, and there will be a short-lived upper and lower tube. The conduction situation causes the device to heat up, so with the dead zone generation circuit, it will delay for a short time when the upper tube is turned off, and then turn on the lower tube. Tube.
4, output mode controller mode
The figure below shows the modes that the output mode controller can set (that is, the function of the output mode controller module of the general-purpose timer)
1: The first mode is freezing. When the described real CNT=CCR, REF remains in its original state. For example, when outputting PWM waves, if you suddenly want to pause the output for a while, you can set it to this mode, and the high and low levels are maintained at the pause time
2: The matching time value is set to the active level, the matching time value is set to the invalid level, and the matching time value level is reversed, that is, when CNT=CCR, REF is set to high level, low level, and the level is reversed. In level inversion mode, a square wave with a duty cycle of 50% can be generated
3: The two modes of forced to invalid level and forced to active level are similar to the freeze mode. If you want to pause the waveform output and keep the low level or high level during the pause, then you can set these two modes
4: PWM2 is the inversion of PWM1. The most commonly used is the PWM1 mode.
5. The main module of PWM generation principle and output comparison abstraction
First of all, here in the upper left corner is the time base unit and the operation control part, and then on the left is the clock source selection, which is omitted here. After configuring the time base unit, the CNT here can start to continuously increase and run.
The very beginning of the output comparison unit circuit is the CCR capture/compare register. The CCR is set by ourselves. The CNT is continuously increasing and running while they are still comparing. The output mode controller is behind it. Take PWM1 mode as an example, it is on the upper right. In the figure in the corner, when CNT has not counted to CCR, it is set to high level, when it is greater than CCR, it is set to low level, when it counts to ARR and then returns to zero, it is set to high level again, reciprocating cycle, and the duty cycle As the CCR changes, if the CCR is set high, the output duty cycle will be larger, if the CCR is set lower, the duty cycle will be smaller, and finally the output can be output after polarity selection and output enable.
6, parameter calculation
Note: The frequency of PWM is equal to the update frequency of the counter
2. External devices
1, steering gear
Model SG90
Execution logic: PWM signal input to the control board, Give the control board a specified target angle. Then, the potentiometer detects the current angle of the output shaft. If it is greater than the target angle, the motor will reverse. If it is less than the target angle, the motor will rotate forward to finally fix the output shaft at the specified angle.
2, DC motor
Code section:
1, PWM drive LED breathing light
initialization steps
- RCC turns on the clock, and turns on the clocks of the TIM peripherals and GPIO peripherals we want to use
- Configure the time base unit, including the previous clock source selection
- Configure the output comparison unit including CCR value, polarity selection, output enable
- Configure GPIO (multiplexed push-pull output)
- Operational control
PWM.C
#include "stm32f10x.h" // Device header
void PWM_Init(void)
{
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
\t
// RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
// GPIO_PinRemapConfig(GPIO_PartialRemap1_TIM2, ENABLE);
// GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);
\t
//The GPIO port configuration corresponding to the output comparison
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //multiplex push-pull output
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0; //GPIO_Pin_15;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA, & GPIO_InitStructure);
\t
TIM_InternalClockConfig(TIM2); //Use the internal 72MHZ clock
Select the clock of the time base unit, select the internal clock, you can not write, because the internal clock is selected by default after the timer is powered on
\t
//time base unit configuration
TIM_TimeBaseInitTypeDef TIM_TimeBaseInitStructure;
TIM_TimeBaseInitStructure.TIM_ClockDivision = TIM_CKD_DIV1;
TIM_TimeBaseInitStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInitStructure.TIM_Period = 100 - 1; //ARR
TIM_TimeBaseInitStructure.TIM_Prescaler = 720 - 1; //PSC
TIM_TimeBaseInitStructure.TIM_RepetitionCounter = 0; //0: non-repetitive counting, for advanced timers
TIM_TimeBaseInit(TIM2, & TIM_TimeBaseInitStructure);
\t
//Output comparison module configuration
TIM_OCInitTypeDef TIM_OCInitStructure;
TIM_OCStructInit( & amp;TIM_OCInitStructure); //Fill each TIM_OCInitStruct member with default value. Because only part of the structure parameters need to be configured
Assign the initial value to the structure, which defines the default initial value to prevent advanced timer errors
\t
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; //PWM1 mode
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; //Output comparison polarity high high advanced polarity not reversed active level is high
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; //Output comparison enable
TIM_OCInitStructure.TIM_Pulse = 0; //CCR specifies the pulse value to be loaded into the capture compare register
TIM_OC1Init(TIM2, & amp;TIM_OCInitStructure);//PA0 port corresponds to the first output comparison channel OC1
\t
TIM_Cmd(TIM2, ENABLE);
}
void PWM_SetCompare1(uint16_t Compare)
{
TIM_SetCompare1(TIM2, Compare); //Set TIM2 to capture Compare1 register value. CCR is 0, the value of CCR can be set by setcompare, and the value of CCR of channel 1 can be changed independently
}
main.c
#include "stm32f10x.h" // Device header
#include "Delay.h"
#include "OLED.h"
#include "PWM.h"
uint8_t i;
int main(void)
{
OLED_Init();
PWM_Init();
\t
while (1)
{
for (i = 0; i <= 100; i ++ )
{
PWM_SetCompare1(i);
Delay_ms(10);
}
for (i = 0; i <= 100; i ++ )
{
PWM_SetCompare1(100 - i);
Delay_ms(10);
}
}
}
Introduction to other functions:
Introduction to output comparison functions
These four functions are to configure the output comparison module, one function configures one unit
void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); Used to assign a default value to the output comparison structure void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct); //--------------------------------------------------- -------------------------------- Here, the configuration of the output comparison is basically completed-- ---------------------- Function to modify the value of CCR register alone ---------------------------------------------------------------------------------------------------- ------------------ Four functions used to change the duty cycle --------------------- ----- void TIM_SetCompare1(TIM_TypeDef* TIMx, uint16_t Compare1); void TIM_SetCompare2(TIM_TypeDef* TIMx, uint16_t Compare2); void TIM_SetCompare3(TIM_TypeDef* TIMx, uint16_t Compare3);
10. Remapping (remapping)
Using AFIO Alternate Function Pin Remapping
Remapping method and pin correspondence, select the remapping method to view the reference manual
GPIO_PartialRemap1_TIM2 //Partial remap 1 GPIO_PartialRemap2_TIM2//partial remap 2 GPIO_FullRemap_TIM2//Full remap
Undebug port parameters:
* @arg GPIO_Remap_SWJ_NoJTRST : Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST//Release the multiplexing of JTRST pin PB4------>GPIO * @arg GPIO_Remap_SWJ_JTAGDisable : JTAG-DP Disabled and SW-DP Enabled//Release the multiplexing of JTAG debug port PA15, PB3, PB4 * @arg GPIO_Remap_SWJ_Disable : Full SWJ Disabled (JTAG-DP + SW-DP)//Release all SWD and JTAG debug ports
Remove all the debug ports of SWD and JTAG, all 5 pins become GPIO, there is no debug function, after that, the st-link can’t download the program, only use serial port to download, download a new program without debug port , so that the debug port can be brought back, this parameter cannot be used indiscriminately
