Quartus II (13.1) How to create a new project + simulation + hardware and load the counter asynchronously as an example

There are too many softwares required for EDA courses. I am afraid that my memory will be fuzzy when I use them in the future, so I decided to simply write a (very detailed) process of creating a new project and simulation. This is also my first blog, maybe There are many problems, please point them out. The best time to plant a tree was ten years ago, and the next best time is now. come on!

I like to create new folders before creating a project.

As shown in the figure below, a new EDA folder was created under the E drive, and two project files were created in it. (Because I have to do two homeworks woo woo woo)

1 Officially start creating the project

1. Open the software page like this, click New Project Wizard (as shown by the red arrow in the picture below)

2. The pop-up window is as shown below, click Next

3. Click the three dots after the first line to select the path, that is, the file where the project is located (do not appear in Chinese, because it cannot be recognized)

In the second line of the picture, write the project name, and the third line will be automatically recognized immediately. Be sure not to enter the wrong project name, otherwise an error will be reported later.

Then click Next.

4. You don’t need to fill in this, click Next.

5. Enter the development board you have with the red arrow. If you don’t have one, don’t touch it. Click the inverted triangle behind the line with the blue arrow. Select FPGA and click Next.

6. Select modelism for simulation, and select Verilog HDL on the right. Generally, there should be no need to change it, and click Next.

7. The following interface appears, click Finish.

8. Click File-New (red arrow position), a pop-up window will appear at the position of the blue arrow, select the Verlog HDL File pointed by the arrow

Click OK.

9. Then you can write the code. Be sure to note that the position of the red arrow must be the name of your project. When you first started learning, you copied the code from the reference book without changing the name. Then you got a compilation error and you still don’t know what is wrong. ! ! ! ! ! (Remember, remember, because my stupid classmate made this mistake!!!!)

Click the icon pointed by the blue arrow to compile.

The code is here!

module ANG (CLK,PM,D,DOUT,RST);
input CLK;
input RST;
input [3:0] D;
output PM;
output[3:0] DOUT;
reg[3:0] Q1;
reg FULL;
(* synthesis,probe_port,keep*) wire LD;
always @(posedge CLK or posedge LD or negedge RST)
 if (!RST) begin Q1<=0; FULL<=0; end
else if (LD) begin Q1<=D; FULL<=0; end
else begin Q1<=Q1 + 1; FULL<=0; end
assign LD=(Q1==4'B0000);
assign PM=FULL;
assign DOUT=Q1;
endmodule 

10. If the place pointed by the red arrow is full of green check marks, it means the compilation is successful. Otherwise, there will be a red ×, and the bottom gray arrow will have a red error correction prompt.

2 Waveform Simulation

1. Click File-New, click VWF (blue arrow) in the pop-up window and click OK.

2. The window shown below will pop up, click Edit-Insert-Insert Node

3. The following window will pop up, click on the red arrow.

4. The following window will pop up, click List (red), then import the data you want to simulate and move it to the right. The blue points will all move from the left to the right. Click OK.

5. Follow the red, blue, and green arrows in sequence. (Red: Select the pin; Blue: Give continuous pulses; Green: The pulse period can be changed)

6. You can give continuous high and low level signals as in the previous step, or as shown in the figure below, when red is selected, blue will give continuous low level, and when red is selected, green will continue to be high. (Only the output signal is given at will, the input signal is generated by operation)

7. Click the icon pointed by the red arrow in the picture below, and a pop-up will pop up asking you to save it. Just save it (it is best to put it in the same folder as the previous code, so as not to mess it up)

Then a small window will appear, which is to detect whether the signal symbol you gave does not meet the code requirements. If there is no error, a new waveform window will automatically pop up, indicating that the simulation is successful. Otherwise, errors will appear in the small detection cutoff window. Generally, the input waveform signal can be modified.

The waveform simulation is now complete!

error window

3 Hardware Simulation

1. Click File-New (red arrow), select Block Diagramy (blue arrow) in the pop-up window, and click OK. At this time, a new hardware simulation file is created.

2. In the interface where the code is located, File-Creat/Update-Creat Symble Files for Current File (red-blue-green-yellow)

That is, packaging the code will generate a device (discussed below).

3. In the hardware project file, click the AND gate icon, and the following window will pop up. Click ANG, which is the hardware device we generated after packaging in the previous step. (Red-Blue-Green) Click OK.

4. Place input and output pins;

To connect the line, place the mouse on one end and click and hold until a “+” appears and connect it to the next end where a small box appears;

Double-click the pin to modify the name, as long as the pin name is consistent with the name of the device connection;

(Red/Blue-Green-Yellow)

! ! ! When the mouse has been holding the device you have used before, click the second icon on the upper layer, which is a small white arrow pointing upward, to cancel the device selection.

5.Waveform simulation

Repeat the Second Waveform Simulation operation.