Tip: After the article is written, the table of contents can be automatically generated. For how to generate it, please refer to the help document on the right. Table of Contents Article directory Purpose 1. Data module generation 1. Data module description: 2. 32CRC check 1. Verification principle 2. Implementation method 3.Data output Purpose Generate […]
Tag: fpga
ZYNQ-FPGA-LCD display color block
1. Related knowledge In TFT LCD, TFT refers to thin film transistor (Thin Film Transistor), and LCD refers to (Liquid Crystal) liquid crystal. There are three main parts of an LCD screen: resolution (pixels), pixel format (color format: RGB, YUV), and drive timing RGB format: R red, G green, B blue. 888 and 565 formats […]
Multiplier design in FPGA (1)
Directory Preface 1. Hardware implementation of multiplier principle 2. Verilog implements multiplication of two signed numbers 2.1 Design thinking 2.2 Programming 2.3 Simulation verification Foreword Hello everybody! This is Xiao Rui, an FPGA beginner. At the same time, this is also my first blog. I will update my learning experience from time to time in […]
FPGA design timing constraints 6. Set maximum/minimum delay
Table of Contents 1. Background 2. Max/Min_delay constraints 2.1 Constraint setting parameters 2.2 Constraint description 3. Project examples 3.1 Engineering code 3.2 Timing report 4. Reference materials 1. Background In the design, sometimes it is necessary to limit the maximum delay and minimum delay of the path, such as asynchronous signals without specific clock relationships, […]
Quickly implement systolic FIR filter based on FPGA, VHDL, systolic array, PE processing unit, FIR filter
Click the blue words to follow us Follow and star the public account, and exciting content will be delivered every day Source: Internet material At present, most methods of implementing FIR (Finite Impulse Response) filters using FPGA (Field Programmable Gate Array) take advantage of the characteristics of the LUT (Lookup Table) in the FPGA and […]
Design a high-speed digital signal transmission system using FPGA and optical fiber transmission
Click the blue words to follow us Follow and star the public account, and exciting content will be delivered every day Source: Internet material In the field of electronic design, multi-channel broadband signals usually need to be collected, processed and transmitted in real time. Traditional signal acquisition and transmission systems use special integrated circuits to […]
FPGA software [Universal Light]
Software download: programming software. Registering an account requires a corporate email address Emails that can use [Enterprise WeChat] Registration takes 2~3 days [Reason: Manually confirmed by Unisplendour] , you will receive an activation email later. Authorization: Network card MAC Find the MAC of the laptop network card, Software Licensing Select ADS After submitting the application, […]
FPGA project: IIC_wr_eeprom
Introduction: Simple bidirectional two-wire system, synchronous serial bus. scl: Serial clock line, used to synchronize communication data. sda: bidirectional serial data line. Physical layer: 1. Support mounting multiple devices. 2. Second-line system. 3. Each device has its own address. 4. When idle, sda will be pulled high by the pull-up resistor. 5. When there are […]
CARRY4 tap delay chain TDC delay design based on FPGA
FPGA-based CARRY4 tap delay chain TDC delay design CARRY4 tap delay chain TDC delay design based on FPGA 1. Reference 2. Principle 3. The chip currently tested is XC7K325TFFG900-2 4. Source code Copyright statement: This article is an original article by CSDN blogger “Getting Started with FPGA” and follows the CC 4.0 BY-SA copyright agreement. […]
FPGA–UART serial communication
Table of contents 1. Introduction to UART 2. Transceiver module timing diagram 2.1 Accept module 2.2 Sending module 3. Overall logic block diagram 4. Code 4.1 Accept module 4.2 Sending module 4.3 Loopback module 4.4 top module 1. Introduction to UART UART (Universal Asynchronous Receiver/Transmitter) is a universal asynchronous receiver and transmitter, which is a […]